Chip Packaging Engineering Manager


Welcome to the Latest Job Vacancies Site 2025 and at this time we would like to inform you of the Latest Job Vacancies from the Google with the position of Chip Packaging Engineering Manager which was opened this.

If this job matches your qualifications, please send your application directly through our latest Job site. Indeed, every job is not easy to apply because it must meet several qualifications and requirements that we must meet in accordance with the standard criteria of the Company who are looking for potential candidates to work. Good job information Chip Packaging Engineering Manager below matches your qualifications.

QualificationMinimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience with package development for high volume production.
  • 3 years of industry experience in engineering management.
Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience in the thermal and mechanical modeling of silicon packaging.
  • Experience with the qualification process for advanced silicon packaging.
  • Knowledge in 2.5D and 3D packaging technologies for high performance computing.
  • Familiarity with general package assembly process, packaging materials, and reliability requirements (component and board level).
Description

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

We are looking for an experienced packaging engineering manager who has excellent leadership and project management experience, is detail oriented, and operationally focused.

In this role, you will lead multi-disciplinary teams throughout custom silicon development with special focus on package Bill Of Materials (BOMs) design tradeoffs, assembly process evaluation, mechanical reliability and qualification and silicon characterization. You will have an excellent experience delivering products into production and in post silicon validation and qualification.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $227,000-$320,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities
  • Lead and manage a team developing chip packages for Google TPUs.
  • Provide technical mentorship on the thermal and mechanical aspects of package design.
  • Drive advanced packaging solutions from concept to high volume production comprehending manufacturing, electrical, thermal and mechanical requirements.
  • Drive collaboration with multi-functional internal teams, Outsourced Assembly and Tests (OSATs) and material suppliers to deliver TPU chip package solutions for production.
Summary
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience with package development for high volume production.
  • 3 years of industry experience in engineering management.

How to Submit an Application:

After reading and knowing the criteria and minimum requirements for qualifications that have been explained from the Chip Packaging Engineering Manager job info - Google Sunnyvale, CA above, thus jobseekers who feel they have not met the requirements including education, age, etc. and really feel interested in the latest job vacancies Chip Packaging Engineering Manager job info - Google Sunnyvale, CA in 2025-07-30 above, should as soon as possible complete and compile a job application file such as a job application letter, CV or curriculum vitae, FC diploma and transcripts and other supplements as described above, in order to register and take part in the admission selection for new employees in the company referred to, sent via form this bottom.


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